3 edition of Processor-controlled timing module for Loran-C receiver found in the catalog.
Processor-controlled timing module for Loran-C receiver
by Avionics Engineering Center, Dept. of Electrical and Computer Engineering, Ohio University in Athens, Ohio
Written in English
|Statement||by Robert W. Lilley ; prepared for NASA Langley Research Center|
|Series||Technical memorandum (NASA) -- 90, NASA technical memorandum -- 90|
|Contributions||Langley Research Center, Ohio University. Avionics Engineering Center|
|The Physical Object|
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Get this from a library. Processor-controlled timing module for Loran-C receiver. [Robert W Lilley; Langley Research Center.; Ohio University. Avionics Engineering Center.]. This banner text can have markup.
web; books; video; audio; software; images; Toggle navigation. Library of Congress Cataloging-in-Publication Data: Freeman, Roger L. Telecommunication system engineering/Roger Freeman–4th ed. Includes bibliographical references and index. ISBN (cloth) 1. The recorder and timing section is upgrading from USH wideband recorders to new Racal Storehorse DD-4 double density recorders and Datum GPS-based timing receiver systems.
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